//*****************************************************************************
//
//  am_mcu_apollo510_otpinfoc.h
//
//*****************************************************************************

//*****************************************************************************
//
// Copyright (c) 2025, Ambiq Micro, Inc.
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision release_sdk5p0p0-5f68a8286b of the AmbiqSuite Development Package.
//
//*****************************************************************************

#ifndef AM_REG_OTP_INFOC_H
#define AM_REG_OTP_INFOC_H

#define AM_REG_OTP_INFOC_BASEADDR 0x400C2000

#define AM_REG_OTP_INFOC_ROT0_O 0x00000044
#define AM_REG_OTP_INFOC_ROT0_ADDR 0x400c2044
#define AM_REG_OTP_INFOC_ROT1_O 0x00000048
#define AM_REG_OTP_INFOC_ROT1_ADDR 0x400c2048
#define AM_REG_OTP_INFOC_ROT2_O 0x0000004c
#define AM_REG_OTP_INFOC_ROT2_ADDR 0x400c204c
#define AM_REG_OTP_INFOC_ROT3_O 0x00000050
#define AM_REG_OTP_INFOC_ROT3_ADDR 0x400c2050
#define AM_REG_OTP_INFOC_ROT4_O 0x00000054
#define AM_REG_OTP_INFOC_ROT4_ADDR 0x400c2054
#define AM_REG_OTP_INFOC_ROT5_O 0x00000058
#define AM_REG_OTP_INFOC_ROT5_ADDR 0x400c2058
#define AM_REG_OTP_INFOC_ROT6_O 0x0000005c
#define AM_REG_OTP_INFOC_ROT6_ADDR 0x400c205c
#define AM_REG_OTP_INFOC_ROT7_O 0x00000060
#define AM_REG_OTP_INFOC_ROT7_ADDR 0x400c2060
#define AM_REG_OTP_INFOC_KCP0_O 0x00000064
#define AM_REG_OTP_INFOC_KCP0_ADDR 0x400c2064
#define AM_REG_OTP_INFOC_KCP1_O 0x00000068
#define AM_REG_OTP_INFOC_KCP1_ADDR 0x400c2068
#define AM_REG_OTP_INFOC_KCP2_O 0x0000006c
#define AM_REG_OTP_INFOC_KCP2_ADDR 0x400c206c
#define AM_REG_OTP_INFOC_KCP3_O 0x00000070
#define AM_REG_OTP_INFOC_KCP3_ADDR 0x400c2070
#define AM_REG_OTP_INFOC_KCE0_O 0x00000074
#define AM_REG_OTP_INFOC_KCE0_ADDR 0x400c2074
#define AM_REG_OTP_INFOC_KCE1_O 0x00000078
#define AM_REG_OTP_INFOC_KCE1_ADDR 0x400c2078
#define AM_REG_OTP_INFOC_KCE2_O 0x0000007c
#define AM_REG_OTP_INFOC_KCE2_ADDR 0x400c207c
#define AM_REG_OTP_INFOC_KCE3_O 0x00000080
#define AM_REG_OTP_INFOC_KCE3_ADDR 0x400c2080
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_O 0x00000084
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_ADDR 0x400c2084
#define AM_REG_OTP_INFOC_HBK1MINVER0_O 0x00000090
#define AM_REG_OTP_INFOC_HBK1MINVER0_ADDR 0x400c2090
#define AM_REG_OTP_INFOC_HBK1MINVER1_O 0x00000094
#define AM_REG_OTP_INFOC_HBK1MINVER1_ADDR 0x400c2094
#define AM_REG_OTP_INFOC_HBK1MINVER2_O 0x00000098
#define AM_REG_OTP_INFOC_HBK1MINVER2_ADDR 0x400c2098
#define AM_REG_OTP_INFOC_SECURITY_O 0x0000009c
#define AM_REG_OTP_INFOC_SECURITY_ADDR 0x400c209c
#define AM_REG_OTP_INFOC_LOCKMASK0_O 0x000000a0
#define AM_REG_OTP_INFOC_LOCKMASK0_ADDR 0x400c20a0
#define AM_REG_OTP_INFOC_LOCKMASK1_O 0x000000a4
#define AM_REG_OTP_INFOC_LOCKMASK1_ADDR 0x400c20a4
#define AM_REG_OTP_INFOC_LOCKMASK2_O 0x000000a8
#define AM_REG_OTP_INFOC_LOCKMASK2_ADDR 0x400c20a8
#define AM_REG_OTP_INFOC_LOCKMASK3_O 0x000000ac
#define AM_REG_OTP_INFOC_LOCKMASK3_ADDR 0x400c20ac
#define AM_REG_OTP_INFOC_SBL_WPROT0_O 0x00000200
#define AM_REG_OTP_INFOC_SBL_WPROT0_ADDR 0x400c2200
#define AM_REG_OTP_INFOC_SBL_WPROT1_O 0x00000204
#define AM_REG_OTP_INFOC_SBL_WPROT1_ADDR 0x400c2204
#define AM_REG_OTP_INFOC_SBL_WPROT2_O 0x00000208
#define AM_REG_OTP_INFOC_SBL_WPROT2_ADDR 0x400c2208
#define AM_REG_OTP_INFOC_SBL_WPROT3_O 0x0000020c
#define AM_REG_OTP_INFOC_SBL_WPROT3_ADDR 0x400c220c
#define AM_REG_OTP_INFOC_SBL_WPROT4_O 0x00000210
#define AM_REG_OTP_INFOC_SBL_WPROT4_ADDR 0x400c2210
#define AM_REG_OTP_INFOC_SBL_WPROT5_O 0x00000214
#define AM_REG_OTP_INFOC_SBL_WPROT5_ADDR 0x400c2214
#define AM_REG_OTP_INFOC_SBL_WPROT6_O 0x00000218
#define AM_REG_OTP_INFOC_SBL_WPROT6_ADDR 0x400c2218
#define AM_REG_OTP_INFOC_SBL_WPROT7_O 0x0000021c
#define AM_REG_OTP_INFOC_SBL_WPROT7_ADDR 0x400c221c
#define AM_REG_OTP_INFOC_SBL_RPROT0_O 0x00000220
#define AM_REG_OTP_INFOC_SBL_RPROT0_ADDR 0x400c2220
#define AM_REG_OTP_INFOC_SBL_RPROT1_O 0x00000224
#define AM_REG_OTP_INFOC_SBL_RPROT1_ADDR 0x400c2224
#define AM_REG_OTP_INFOC_SBL_RPROT2_O 0x00000228
#define AM_REG_OTP_INFOC_SBL_RPROT2_ADDR 0x400c2228
#define AM_REG_OTP_INFOC_SBL_RPROT3_O 0x0000022c
#define AM_REG_OTP_INFOC_SBL_RPROT3_ADDR 0x400c222c
#define AM_REG_OTP_INFOC_SBL_RPROT4_O 0x00000230
#define AM_REG_OTP_INFOC_SBL_RPROT4_ADDR 0x400c2230
#define AM_REG_OTP_INFOC_SBL_RPROT5_O 0x00000234
#define AM_REG_OTP_INFOC_SBL_RPROT5_ADDR 0x400c2234
#define AM_REG_OTP_INFOC_SBL_RPROT6_O 0x00000238
#define AM_REG_OTP_INFOC_SBL_RPROT6_ADDR 0x400c2238
#define AM_REG_OTP_INFOC_SBL_RPROT7_O 0x0000023c
#define AM_REG_OTP_INFOC_SBL_RPROT7_ADDR 0x400c223c
#define AM_REG_OTP_INFOC_DCU_DISABLEOVERRIDE_O 0x00000240
#define AM_REG_OTP_INFOC_DCU_DISABLEOVERRIDE_ADDR 0x400c2240
#define AM_REG_OTP_INFOC_SEC_POL_O 0x0000024c
#define AM_REG_OTP_INFOC_SEC_POL_ADDR 0x400c224c
#define AM_REG_OTP_INFOC_BOOT_OVERRIDE_O 0x00000250
#define AM_REG_OTP_INFOC_BOOT_OVERRIDE_ADDR 0x400c2250
#define AM_REG_OTP_INFOC_WIRED_CONFIG_O 0x00000254
#define AM_REG_OTP_INFOC_WIRED_CONFIG_ADDR 0x400c2254
#define AM_REG_OTP_INFOC_CUST_WPROT0_O 0x00000258
#define AM_REG_OTP_INFOC_CUST_WPROT0_ADDR 0x400c2258
#define AM_REG_OTP_INFOC_CUST_WPROT1_O 0x0000025c
#define AM_REG_OTP_INFOC_CUST_WPROT1_ADDR 0x400c225c
#define AM_REG_OTP_INFOC_CUST_WPROT2_O 0x00000260
#define AM_REG_OTP_INFOC_CUST_WPROT2_ADDR 0x400c2260
#define AM_REG_OTP_INFOC_CUST_WPROT3_O 0x00000264
#define AM_REG_OTP_INFOC_CUST_WPROT3_ADDR 0x400c2264
#define AM_REG_OTP_INFOC_CUST_WPROT4_O 0x00000268
#define AM_REG_OTP_INFOC_CUST_WPROT4_ADDR 0x400c2268
#define AM_REG_OTP_INFOC_CUST_WPROT5_O 0x0000026c
#define AM_REG_OTP_INFOC_CUST_WPROT5_ADDR 0x400c226c
#define AM_REG_OTP_INFOC_CUST_WPROT6_O 0x00000270
#define AM_REG_OTP_INFOC_CUST_WPROT6_ADDR 0x400c2270
#define AM_REG_OTP_INFOC_CUST_WPROT7_O 0x00000274
#define AM_REG_OTP_INFOC_CUST_WPROT7_ADDR 0x400c2274
#define AM_REG_OTP_INFOC_CUSTOTP_PROGLOCK_O 0x00000278
#define AM_REG_OTP_INFOC_CUSTOTP_PROGLOCK_ADDR 0x400c2278
#define AM_REG_OTP_INFOC_CUSTOTP_RDLOCK_O 0x0000027c
#define AM_REG_OTP_INFOC_CUSTOTP_RDLOCK_ADDR 0x400c227c
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY0_O 0x00000280
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY0_ADDR 0x400c2280
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY1_O 0x00000284
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY1_ADDR 0x400c2284
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY2_O 0x00000288
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY2_ADDR 0x400c2288
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY3_O 0x0000028c
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY3_ADDR 0x400c228c
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY0_O 0x00000290
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY0_ADDR 0x400c2290
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY1_O 0x00000294
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY1_ADDR 0x400c2294
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY2_O 0x00000298
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY2_ADDR 0x400c2298
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY3_O 0x0000029c
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY3_ADDR 0x400c229c
#define AM_REG_OTP_INFOC_CUST_RPROT0_O 0x000002a0
#define AM_REG_OTP_INFOC_CUST_RPROT0_ADDR 0x400c22a0
#define AM_REG_OTP_INFOC_CUST_RPROT1_O 0x000002a4
#define AM_REG_OTP_INFOC_CUST_RPROT1_ADDR 0x400c22a4
#define AM_REG_OTP_INFOC_CUST_RPROT2_O 0x000002a8
#define AM_REG_OTP_INFOC_CUST_RPROT2_ADDR 0x400c22a8
#define AM_REG_OTP_INFOC_CUST_RPROT3_O 0x000002ac
#define AM_REG_OTP_INFOC_CUST_RPROT3_ADDR 0x400c22ac
#define AM_REG_OTP_INFOC_CUST_RPROT4_O 0x000002b0
#define AM_REG_OTP_INFOC_CUST_RPROT4_ADDR 0x400c22b0
#define AM_REG_OTP_INFOC_CUST_RPROT5_O 0x000002b4
#define AM_REG_OTP_INFOC_CUST_RPROT5_ADDR 0x400c22b4
#define AM_REG_OTP_INFOC_CUST_RPROT6_O 0x000002b8
#define AM_REG_OTP_INFOC_CUST_RPROT6_ADDR 0x400c22b8
#define AM_REG_OTP_INFOC_CUST_RPROT7_O 0x000002bc
#define AM_REG_OTP_INFOC_CUST_RPROT7_ADDR 0x400c22bc
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY0_O 0x000002c0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY0_ADDR 0x400c22c0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY1_O 0x000002c4
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY1_ADDR 0x400c22c4
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY2_O 0x000002c8
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY2_ADDR 0x400c22c8
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY3_O 0x000002cc
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY3_ADDR 0x400c22cc
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY4_O 0x000002d0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY4_ADDR 0x400c22d0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY5_O 0x000002d4
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY5_ADDR 0x400c22d4
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY6_O 0x000002d8
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY6_ADDR 0x400c22d8
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY7_O 0x000002dc
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY7_ADDR 0x400c22dc
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY8_O 0x000002e0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY8_ADDR 0x400c22e0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY9_O 0x000002e4
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY9_ADDR 0x400c22e4
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY10_O 0x000002e8
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY10_ADDR 0x400c22e8
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY11_O 0x000002ec
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY11_ADDR 0x400c22ec
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY12_O 0x000002f0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY12_ADDR 0x400c22f0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY13_O 0x000002f4
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY13_ADDR 0x400c22f4
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY14_O 0x000002f8
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY14_ADDR 0x400c22f8
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY15_O 0x000002fc
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY15_ADDR 0x400c22fc
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY0_O 0x00000300
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY0_ADDR 0x400c2300
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY1_O 0x00000304
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY1_ADDR 0x400c2304
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY2_O 0x00000308
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY2_ADDR 0x400c2308
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY3_O 0x0000030c
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY3_ADDR 0x400c230c
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY4_O 0x00000310
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY4_ADDR 0x400c2310
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY5_O 0x00000314
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY5_ADDR 0x400c2314
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY6_O 0x00000318
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY6_ADDR 0x400c2318
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY7_O 0x0000031c
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY7_ADDR 0x400c231c
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY8_O 0x00000320
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY8_ADDR 0x400c2320
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY9_O 0x00000324
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY9_ADDR 0x400c2324
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY10_O 0x00000328
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY10_ADDR 0x400c2328
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY11_O 0x0000032c
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY11_ADDR 0x400c232c
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY12_O 0x00000330
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY12_ADDR 0x400c2330
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY13_O 0x00000334
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY13_ADDR 0x400c2334
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY14_O 0x00000338
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY14_ADDR 0x400c2338
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY15_O 0x0000033c
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY15_ADDR 0x400c233c
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY0_O 0x00000340
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY0_ADDR 0x400c2340
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY1_O 0x00000344
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY1_ADDR 0x400c2344
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY2_O 0x00000348
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY2_ADDR 0x400c2348
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY3_O 0x0000034c
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY3_ADDR 0x400c234c
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY4_O 0x00000350
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY4_ADDR 0x400c2350
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY5_O 0x00000354
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY5_ADDR 0x400c2354
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY6_O 0x00000358
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY6_ADDR 0x400c2358
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY7_O 0x0000035c
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY7_ADDR 0x400c235c
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY8_O 0x00000360
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY8_ADDR 0x400c2360
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY9_O 0x00000364
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY9_ADDR 0x400c2364
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY10_O 0x00000368
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY10_ADDR 0x400c2368
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY11_O 0x0000036c
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY11_ADDR 0x400c236c
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY12_O 0x00000370
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY12_ADDR 0x400c2370
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY13_O 0x00000374
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY13_ADDR 0x400c2374
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY14_O 0x00000378
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY14_ADDR 0x400c2378
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY15_O 0x0000037c
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY15_ADDR 0x400c237c
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY0_O 0x00000380
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY0_ADDR 0x400c2380
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY1_O 0x00000384
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY1_ADDR 0x400c2384
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY2_O 0x00000388
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY2_ADDR 0x400c2388
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY3_O 0x0000038c
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY3_ADDR 0x400c238c
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY4_O 0x00000390
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY4_ADDR 0x400c2390
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY5_O 0x00000394
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY5_ADDR 0x400c2394
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY6_O 0x00000398
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY6_ADDR 0x400c2398
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY7_O 0x0000039c
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY7_ADDR 0x400c239c
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY8_O 0x000003a0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY8_ADDR 0x400c23a0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY9_O 0x000003a4
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY9_ADDR 0x400c23a4
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY10_O 0x000003a8
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY10_ADDR 0x400c23a8
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY11_O 0x000003ac
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY11_ADDR 0x400c23ac
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY12_O 0x000003b0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY12_ADDR 0x400c23b0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY13_O 0x000003b4
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY13_ADDR 0x400c23b4
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY14_O 0x000003b8
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY14_ADDR 0x400c23b8
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY15_O 0x000003bc
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY15_ADDR 0x400c23bc
#define AM_REG_OTP_INFOC_SHDW_TRIM_INFO0_SEL_O 0x000003fc
#define AM_REG_OTP_INFOC_SHDW_TRIM_INFO0_SEL_ADDR 0x400c23fc

// ROT0 - Word 0 (bits 31:0) of the 256-bit ROT
#define AM_REG_OTP_INFOC_ROT0_ROT0_S 0
#define AM_REG_OTP_INFOC_ROT0_ROT0_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_ROT0_ROT0(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_ROT0_ROT0_Pos 0
#define AM_REG_OTP_INFOC_ROT0_ROT0_Msk 0xFFFFFFFF

// ROT1 - Word 1 (bits 63:32) of the 256-bit ROT
#define AM_REG_OTP_INFOC_ROT1_ROT1_S 0
#define AM_REG_OTP_INFOC_ROT1_ROT1_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_ROT1_ROT1(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_ROT1_ROT1_Pos 0
#define AM_REG_OTP_INFOC_ROT1_ROT1_Msk 0xFFFFFFFF

// ROT2 - Word 2 (bits 95:64) of the 256-bit ROT
#define AM_REG_OTP_INFOC_ROT2_ROT2_S 0
#define AM_REG_OTP_INFOC_ROT2_ROT2_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_ROT2_ROT2(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_ROT2_ROT2_Pos 0
#define AM_REG_OTP_INFOC_ROT2_ROT2_Msk 0xFFFFFFFF

// ROT3 - Word 3 (bits 127:96) of the 256-bit ROT
#define AM_REG_OTP_INFOC_ROT3_ROT3_S 0
#define AM_REG_OTP_INFOC_ROT3_ROT3_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_ROT3_ROT3(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_ROT3_ROT3_Pos 0
#define AM_REG_OTP_INFOC_ROT3_ROT3_Msk 0xFFFFFFFF

// ROT4 - Word 4 (bits 159:128) of the 256-bit ROT
#define AM_REG_OTP_INFOC_ROT4_ROT4_S 0
#define AM_REG_OTP_INFOC_ROT4_ROT4_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_ROT4_ROT4(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_ROT4_ROT4_Pos 0
#define AM_REG_OTP_INFOC_ROT4_ROT4_Msk 0xFFFFFFFF

// ROT5 - Word 5 (bits 191:160) of the 256-bit ROT
#define AM_REG_OTP_INFOC_ROT5_ROT5_S 0
#define AM_REG_OTP_INFOC_ROT5_ROT5_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_ROT5_ROT5(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_ROT5_ROT5_Pos 0
#define AM_REG_OTP_INFOC_ROT5_ROT5_Msk 0xFFFFFFFF

// ROT6 - Word 6 (bits 223:192) of the 256-bit ROT
#define AM_REG_OTP_INFOC_ROT6_ROT6_S 0
#define AM_REG_OTP_INFOC_ROT6_ROT6_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_ROT6_ROT6(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_ROT6_ROT6_Pos 0
#define AM_REG_OTP_INFOC_ROT6_ROT6_Msk 0xFFFFFFFF

// ROT7 - Word 7 (bits 255:224) of the 256-bit ROT
#define AM_REG_OTP_INFOC_ROT7_ROT7_S 0
#define AM_REG_OTP_INFOC_ROT7_ROT7_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_ROT7_ROT7(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_ROT7_ROT7_Pos 0
#define AM_REG_OTP_INFOC_ROT7_ROT7_Msk 0xFFFFFFFF

// KCP0 - Word 0 (bits 32:0) of the 128-bit KCP
#define AM_REG_OTP_INFOC_KCP0_KCP0_S 0
#define AM_REG_OTP_INFOC_KCP0_KCP0_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KCP0_KCP0(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KCP0_KCP0_Pos 0
#define AM_REG_OTP_INFOC_KCP0_KCP0_Msk 0xFFFFFFFF

// KCP1 - Word 1 (bits 63:32) of the 128-bit KCP
#define AM_REG_OTP_INFOC_KCP1_KCP1_S 0
#define AM_REG_OTP_INFOC_KCP1_KCP1_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KCP1_KCP1(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KCP1_KCP1_Pos 0
#define AM_REG_OTP_INFOC_KCP1_KCP1_Msk 0xFFFFFFFF

// KCP2 - Word 2 (bits 95:64) of the 128-bit KCP
#define AM_REG_OTP_INFOC_KCP2_KCP2_S 0
#define AM_REG_OTP_INFOC_KCP2_KCP2_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KCP2_KCP2(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KCP2_KCP2_Pos 0
#define AM_REG_OTP_INFOC_KCP2_KCP2_Msk 0xFFFFFFFF

// KCP3 - Word 3 (bits 127:96) of the 128-bit KCP
#define AM_REG_OTP_INFOC_KCP3_KCP3_S 0
#define AM_REG_OTP_INFOC_KCP3_KCP3_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KCP3_KCP3(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KCP3_KCP3_Pos 0
#define AM_REG_OTP_INFOC_KCP3_KCP3_Msk 0xFFFFFFFF

// KCE0 - Word 0 (bits 32:0) of the 128-bit KCE
#define AM_REG_OTP_INFOC_KCE0_KCE0_S 0
#define AM_REG_OTP_INFOC_KCE0_KCE0_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KCE0_KCE0(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KCE0_KCE0_Pos 0
#define AM_REG_OTP_INFOC_KCE0_KCE0_Msk 0xFFFFFFFF

// KCE1 - Word 1 (bits 63:32) of the 128-bit KCE
#define AM_REG_OTP_INFOC_KCE1_KCE1_S 0
#define AM_REG_OTP_INFOC_KCE1_KCE1_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KCE1_KCE1(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KCE1_KCE1_Pos 0
#define AM_REG_OTP_INFOC_KCE1_KCE1_Msk 0xFFFFFFFF

// KCE2 - Word 2 (bits 95:64) of the 128-bit KCE
#define AM_REG_OTP_INFOC_KCE2_KCE2_S 0
#define AM_REG_OTP_INFOC_KCE2_KCE2_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KCE2_KCE2(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KCE2_KCE2_Pos 0
#define AM_REG_OTP_INFOC_KCE2_KCE2_Msk 0xFFFFFFFF

// KCE3 - Word 3 (bits 127:96) of the 128-bit KCE
#define AM_REG_OTP_INFOC_KCE3_KCE3_S 0
#define AM_REG_OTP_INFOC_KCE3_KCE3_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KCE3_KCE3(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KCE3_KCE3_Pos 0
#define AM_REG_OTP_INFOC_KCE3_KCE3_Msk 0xFFFFFFFF

// OEMPROGFLAGS - OEM Programmed Flags
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_ICVRMAFLAG_S 31
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_ICVRMAFLAG_M 0x80000000
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_ICVRMAFLAG(n) (((uint32_t)(n) << 31) & 0x80000000)
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_ICVRMAFLAG_Pos 31
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_ICVRMAFLAG_Msk 0x80000000
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_OEMRMAFLAG_S 30
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_OEMRMAFLAG_M 0x40000000
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_OEMRMAFLAG(n) (((uint32_t)(n) << 30) & 0x40000000)
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_OEMRMAFLAG_Pos 30
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_OEMRMAFLAG_Msk 0x40000000
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_RESERVED_S 24
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_RESERVED_M 0x3F000000
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_RESERVED(n) (((uint32_t)(n) << 24) & 0x3F000000)
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_RESERVED_Pos 24
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_RESERVED_Msk 0x3F000000
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_KCENOTINUSE_S 23
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_KCENOTINUSE_M 0x00800000
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_KCENOTINUSE(n) (((uint32_t)(n) << 23) & 0x00800000)
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_KCENOTINUSE_Pos 23
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_KCENOTINUSE_Msk 0x00800000
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_NUMZEROKCE_S 16
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_NUMZEROKCE_M 0x007F0000
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_NUMZEROKCE(n) (((uint32_t)(n) << 16) & 0x007F0000)
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_NUMZEROKCE_Pos 16
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_NUMZEROKCE_Msk 0x007F0000
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_KCPNOTINUSE_S 15
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_KCPNOTINUSE_M 0x00008000
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_KCPNOTINUSE(n) (((uint32_t)(n) << 15) & 0x00008000)
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_KCPNOTINUSE_Pos 15
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_KCPNOTINUSE_Msk 0x00008000
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_NUMZEROKCP_S 8
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_NUMZEROKCP_M 0x00007F00
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_NUMZEROKCP(n) (((uint32_t)(n) << 8) & 0x00007F00)
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_NUMZEROKCP_Pos 8
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_NUMZEROKCP_Msk 0x00007F00
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_NUMZEROHBK1_S 0
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_NUMZEROHBK1_M 0x000000FF
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_NUMZEROHBK1(n) (((uint32_t)(n) << 0) & 0x000000FF)
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_NUMZEROHBK1_Pos 0
#define AM_REG_OTP_INFOC_OEMPROGFLAGS_NUMZEROHBK1_Msk 0x000000FF

// HBK1MINVER0 - HBK1 Trusted Software minimum version (anti-rollback counter)
#define AM_REG_OTP_INFOC_HBK1MINVER0_HBK1MINVER0_S 0
#define AM_REG_OTP_INFOC_HBK1MINVER0_HBK1MINVER0_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_HBK1MINVER0_HBK1MINVER0(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_HBK1MINVER0_HBK1MINVER0_Pos 0
#define AM_REG_OTP_INFOC_HBK1MINVER0_HBK1MINVER0_Msk 0xFFFFFFFF

// HBK1MINVER1 - HBK1 Trusted Software minimum version (anti-rollback counter)
#define AM_REG_OTP_INFOC_HBK1MINVER1_HBK1MINVER1_S 0
#define AM_REG_OTP_INFOC_HBK1MINVER1_HBK1MINVER1_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_HBK1MINVER1_HBK1MINVER1(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_HBK1MINVER1_HBK1MINVER1_Pos 0
#define AM_REG_OTP_INFOC_HBK1MINVER1_HBK1MINVER1_Msk 0xFFFFFFFF

// HBK1MINVER2 - HBK1 Trusted Software minimum version (anti-rollback counter)
#define AM_REG_OTP_INFOC_HBK1MINVER2_HBK1MINVER2_S 0
#define AM_REG_OTP_INFOC_HBK1MINVER2_HBK1MINVER2_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_HBK1MINVER2_HBK1MINVER2(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_HBK1MINVER2_HBK1MINVER2_Pos 0
#define AM_REG_OTP_INFOC_HBK1MINVER2_HBK1MINVER2_Msk 0xFFFFFFFF

// SECURITY - General purpose persistent configuration
#define AM_REG_OTP_INFOC_SECURITY_RSVD31_S 31
#define AM_REG_OTP_INFOC_SECURITY_RSVD31_M 0x80000000
#define AM_REG_OTP_INFOC_SECURITY_RSVD31(n) (((uint32_t)(n) << 31) & 0x80000000)
#define AM_REG_OTP_INFOC_SECURITY_RSVD31_Pos 31
#define AM_REG_OTP_INFOC_SECURITY_RSVD31_Msk 0x80000000
#define AM_REG_OTP_INFOC_SECURITY_CUST_SECBOOTONRST_S 28
#define AM_REG_OTP_INFOC_SECURITY_CUST_SECBOOTONRST_M 0x70000000
#define AM_REG_OTP_INFOC_SECURITY_CUST_SECBOOTONRST(n) (((uint32_t)(n) << 28) & 0x70000000)
#define AM_REG_OTP_INFOC_SECURITY_CUST_SECBOOTONRST_Pos 28
#define AM_REG_OTP_INFOC_SECURITY_CUST_SECBOOTONRST_Msk 0x70000000
#define AM_ENUM_OTP_INFOC_SECURITY_CUST_SECBOOTONRST_SBORUNINIT 0x0  // Secure boot on reset is uninitialized
#define AM_ENUM_OTP_INFOC_SECURITY_CUST_SECBOOTONRST_SBOREN     0x2  // Secure boot on reset enable
#define AM_ENUM_OTP_INFOC_SECURITY_CUST_SECBOOTONRST_SBORDIS    0x5  // Secure boot on reset disabled. Only specific portions of secure boot flow are bypassed to allow for lower latency resume.
#define AM_REG_OTP_INFOC_SECURITY_RSVD27_S 27
#define AM_REG_OTP_INFOC_SECURITY_RSVD27_M 0x08000000
#define AM_REG_OTP_INFOC_SECURITY_RSVD27(n) (((uint32_t)(n) << 27) & 0x08000000)
#define AM_REG_OTP_INFOC_SECURITY_RSVD27_Pos 27
#define AM_REG_OTP_INFOC_SECURITY_RSVD27_Msk 0x08000000
#define AM_REG_OTP_INFOC_SECURITY_AMB_SECBOOT_S 24
#define AM_REG_OTP_INFOC_SECURITY_AMB_SECBOOT_M 0x07000000
#define AM_REG_OTP_INFOC_SECURITY_AMB_SECBOOT(n) (((uint32_t)(n) << 24) & 0x07000000)
#define AM_REG_OTP_INFOC_SECURITY_AMB_SECBOOT_Pos 24
#define AM_REG_OTP_INFOC_SECURITY_AMB_SECBOOT_Msk 0x07000000
#define AM_ENUM_OTP_INFOC_SECURITY_AMB_SECBOOT_SBUNINIT         0x0  // Secure boot is uninitialized
#define AM_ENUM_OTP_INFOC_SECURITY_AMB_SECBOOT_SBEN             0x2  // Secure boot enable
#define AM_ENUM_OTP_INFOC_SECURITY_AMB_SECBOOT_SBDIS            0x5  // Secure boot disabled
#define AM_REG_OTP_INFOC_SECURITY_RSVD23_S 23
#define AM_REG_OTP_INFOC_SECURITY_RSVD23_M 0x00800000
#define AM_REG_OTP_INFOC_SECURITY_RSVD23(n) (((uint32_t)(n) << 23) & 0x00800000)
#define AM_REG_OTP_INFOC_SECURITY_RSVD23_Pos 23
#define AM_REG_OTP_INFOC_SECURITY_RSVD23_Msk 0x00800000
#define AM_REG_OTP_INFOC_SECURITY_AMB_SECBOOT_INST_S 20
#define AM_REG_OTP_INFOC_SECURITY_AMB_SECBOOT_INST_M 0x00700000
#define AM_REG_OTP_INFOC_SECURITY_AMB_SECBOOT_INST(n) (((uint32_t)(n) << 20) & 0x00700000)
#define AM_REG_OTP_INFOC_SECURITY_AMB_SECBOOT_INST_Pos 20
#define AM_REG_OTP_INFOC_SECURITY_AMB_SECBOOT_INST_Msk 0x00700000
#define AM_ENUM_OTP_INFOC_SECURITY_AMB_SECBOOT_INST_SBUNINIT    0x0  // Secure boot install is uninitialized
#define AM_ENUM_OTP_INFOC_SECURITY_AMB_SECBOOT_INST_SBEN        0x2  // Secure boot install enable
#define AM_ENUM_OTP_INFOC_SECURITY_AMB_SECBOOT_INST_SBDIS       0x5  // Secure boot install disabled
#define AM_REG_OTP_INFOC_SECURITY_RSVD16_S 16
#define AM_REG_OTP_INFOC_SECURITY_RSVD16_M 0x000F0000
#define AM_REG_OTP_INFOC_SECURITY_RSVD16(n) (((uint32_t)(n) << 16) & 0x000F0000)
#define AM_REG_OTP_INFOC_SECURITY_RSVD16_Pos 16
#define AM_REG_OTP_INFOC_SECURITY_RSVD16_Msk 0x000F0000
#define AM_REG_OTP_INFOC_SECURITY_DIS_CUST_INFO_PROG_S 12
#define AM_REG_OTP_INFOC_SECURITY_DIS_CUST_INFO_PROG_M 0x0000F000
#define AM_REG_OTP_INFOC_SECURITY_DIS_CUST_INFO_PROG(n) (((uint32_t)(n) << 12) & 0x0000F000)
#define AM_REG_OTP_INFOC_SECURITY_DIS_CUST_INFO_PROG_Pos 12
#define AM_REG_OTP_INFOC_SECURITY_DIS_CUST_INFO_PROG_Msk 0x0000F000
#define AM_REG_OTP_INFOC_SECURITY_PLONEXIT_S 11
#define AM_REG_OTP_INFOC_SECURITY_PLONEXIT_M 0x00000800
#define AM_REG_OTP_INFOC_SECURITY_PLONEXIT(n) (((uint32_t)(n) << 11) & 0x00000800)
#define AM_REG_OTP_INFOC_SECURITY_PLONEXIT_Pos 11
#define AM_REG_OTP_INFOC_SECURITY_PLONEXIT_Msk 0x00000800
#define AM_ENUM_OTP_INFOC_SECURITY_PLONEXIT_PLNS                0x1  // PROTLOCK No Secondary bootloader.  No secondary bootloader is provided, thus the Secure Bootloader (SBL) asserts PROTLOCK for protection of NVM and OTP keybank.
#define AM_ENUM_OTP_INFOC_SECURITY_PLONEXIT_PLS                 0x0  // PROTLOCK by Secondary bootloader. The Secure Bootloader (SBL) keeps PROTLOCK open for the secondary bootloader. It is the responsibility of the secondary bootloader to assert PROTLOCK upon exit.
#define AM_REG_OTP_INFOC_SECURITY_CUST_SECBOOT_S 8
#define AM_REG_OTP_INFOC_SECURITY_CUST_SECBOOT_M 0x00000700
#define AM_REG_OTP_INFOC_SECURITY_CUST_SECBOOT(n) (((uint32_t)(n) << 8) & 0x00000700)
#define AM_REG_OTP_INFOC_SECURITY_CUST_SECBOOT_Pos 8
#define AM_REG_OTP_INFOC_SECURITY_CUST_SECBOOT_Msk 0x00000700
#define AM_ENUM_OTP_INFOC_SECURITY_CUST_SECBOOT_SBUNINIT        0x0  // Customer secure boot is uninitialized
#define AM_ENUM_OTP_INFOC_SECURITY_CUST_SECBOOT_SBEN            0x2  // Customer secure boot enable
#define AM_ENUM_OTP_INFOC_SECURITY_CUST_SECBOOT_SBDIS           0x5  // Customer secure boot disabled
#define AM_REG_OTP_INFOC_SECURITY_AMB_CRYPTO_PUBLOCK_S 5
#define AM_REG_OTP_INFOC_SECURITY_AMB_CRYPTO_PUBLOCK_M 0x000000E0
#define AM_REG_OTP_INFOC_SECURITY_AMB_CRYPTO_PUBLOCK(n) (((uint32_t)(n) << 5) & 0x000000E0)
#define AM_REG_OTP_INFOC_SECURITY_AMB_CRYPTO_PUBLOCK_Pos 5
#define AM_REG_OTP_INFOC_SECURITY_AMB_CRYPTO_PUBLOCK_Msk 0x000000E0
#define AM_ENUM_OTP_INFOC_SECURITY_AMB_CRYPTO_PUBLOCK_Disabled  0x5  // No decryption.
#define AM_REG_OTP_INFOC_SECURITY_RSVD_GPPC_S 0
#define AM_REG_OTP_INFOC_SECURITY_RSVD_GPPC_M 0x0000001F
#define AM_REG_OTP_INFOC_SECURITY_RSVD_GPPC(n) (((uint32_t)(n) << 0) & 0x0000001F)
#define AM_REG_OTP_INFOC_SECURITY_RSVD_GPPC_Pos 0
#define AM_REG_OTP_INFOC_SECURITY_RSVD_GPPC_Msk 0x0000001F

// LOCKMASK0 - OTP DCU lock mask
#define AM_REG_OTP_INFOC_LOCKMASK0_OTP_DCU_LOCK_MASK0_S 0
#define AM_REG_OTP_INFOC_LOCKMASK0_OTP_DCU_LOCK_MASK0_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_LOCKMASK0_OTP_DCU_LOCK_MASK0(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_LOCKMASK0_OTP_DCU_LOCK_MASK0_Pos 0
#define AM_REG_OTP_INFOC_LOCKMASK0_OTP_DCU_LOCK_MASK0_Msk 0xFFFFFFFF

// LOCKMASK1 - OTP DCU lock mask
#define AM_REG_OTP_INFOC_LOCKMASK1_OTP_DCU_LOCK_MASK1_S 0
#define AM_REG_OTP_INFOC_LOCKMASK1_OTP_DCU_LOCK_MASK1_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_LOCKMASK1_OTP_DCU_LOCK_MASK1(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_LOCKMASK1_OTP_DCU_LOCK_MASK1_Pos 0
#define AM_REG_OTP_INFOC_LOCKMASK1_OTP_DCU_LOCK_MASK1_Msk 0xFFFFFFFF

// LOCKMASK2 - OTP DCU lock mask
#define AM_REG_OTP_INFOC_LOCKMASK2_OTP_DCU_LOCK_MASK2_S 0
#define AM_REG_OTP_INFOC_LOCKMASK2_OTP_DCU_LOCK_MASK2_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_LOCKMASK2_OTP_DCU_LOCK_MASK2(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_LOCKMASK2_OTP_DCU_LOCK_MASK2_Pos 0
#define AM_REG_OTP_INFOC_LOCKMASK2_OTP_DCU_LOCK_MASK2_Msk 0xFFFFFFFF

// LOCKMASK3 - OTP DCU lock mask
#define AM_REG_OTP_INFOC_LOCKMASK3_OTP_DCU_LOCK_MASK3_S 0
#define AM_REG_OTP_INFOC_LOCKMASK3_OTP_DCU_LOCK_MASK3_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_LOCKMASK3_OTP_DCU_LOCK_MASK3(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_LOCKMASK3_OTP_DCU_LOCK_MASK3_Pos 0
#define AM_REG_OTP_INFOC_LOCKMASK3_OTP_DCU_LOCK_MASK3_Msk 0xFFFFFFFF

// SBL_WPROT0 - These bits write-protect NVRAM in 16KB chunks. Only SBL can override these through Secure OTA.
#define AM_REG_OTP_INFOC_SBL_WPROT0_CHUNKS_S 0
#define AM_REG_OTP_INFOC_SBL_WPROT0_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_SBL_WPROT0_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_SBL_WPROT0_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_SBL_WPROT0_CHUNKS_Msk 0xFFFFFFFF

// SBL_WPROT1 - These bits write-protect NVRAM in 16KB chunks. Only SBL can override these through Secure OTA.
#define AM_REG_OTP_INFOC_SBL_WPROT1_CHUNKS_S 0
#define AM_REG_OTP_INFOC_SBL_WPROT1_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_SBL_WPROT1_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_SBL_WPROT1_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_SBL_WPROT1_CHUNKS_Msk 0xFFFFFFFF

// SBL_WPROT2 - These bits write-protect NVRAM in 16KB chunks. Only SBL can override these through Secure OTA.
#define AM_REG_OTP_INFOC_SBL_WPROT2_CHUNKS_S 0
#define AM_REG_OTP_INFOC_SBL_WPROT2_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_SBL_WPROT2_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_SBL_WPROT2_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_SBL_WPROT2_CHUNKS_Msk 0xFFFFFFFF

// SBL_WPROT3 - These bits write-protect NVRAM in 16KB chunks. Only SBL can override these through Secure OTA.
#define AM_REG_OTP_INFOC_SBL_WPROT3_CHUNKS_S 0
#define AM_REG_OTP_INFOC_SBL_WPROT3_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_SBL_WPROT3_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_SBL_WPROT3_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_SBL_WPROT3_CHUNKS_Msk 0xFFFFFFFF

// SBL_WPROT4 - These bits write-protect NVRAM in 16KB chunks. Only SBL can override these through Secure OTA.
#define AM_REG_OTP_INFOC_SBL_WPROT4_CHUNKS_S 0
#define AM_REG_OTP_INFOC_SBL_WPROT4_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_SBL_WPROT4_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_SBL_WPROT4_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_SBL_WPROT4_CHUNKS_Msk 0xFFFFFFFF

// SBL_WPROT5 - These bits write-protect NVRAM in 16KB chunks. Only SBL can override these through Secure OTA.
#define AM_REG_OTP_INFOC_SBL_WPROT5_CHUNKS_S 0
#define AM_REG_OTP_INFOC_SBL_WPROT5_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_SBL_WPROT5_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_SBL_WPROT5_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_SBL_WPROT5_CHUNKS_Msk 0xFFFFFFFF

// SBL_WPROT6 - These bits write-protect NVRAM in 16KB chunks. Only SBL can override these through Secure OTA.
#define AM_REG_OTP_INFOC_SBL_WPROT6_CHUNKS_S 0
#define AM_REG_OTP_INFOC_SBL_WPROT6_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_SBL_WPROT6_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_SBL_WPROT6_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_SBL_WPROT6_CHUNKS_Msk 0xFFFFFFFF

// SBL_WPROT7 - These bits write-protect NVRAM in 16KB chunks. Only SBL can override these through Secure OTA.
#define AM_REG_OTP_INFOC_SBL_WPROT7_CHUNKS_S 0
#define AM_REG_OTP_INFOC_SBL_WPROT7_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_SBL_WPROT7_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_SBL_WPROT7_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_SBL_WPROT7_CHUNKS_Msk 0xFFFFFFFF

// SBL_RPROT0 - These bits read-protect NVRAM in 16KB chunks.
#define AM_REG_OTP_INFOC_SBL_RPROT0_CHUNKS_S 0
#define AM_REG_OTP_INFOC_SBL_RPROT0_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_SBL_RPROT0_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_SBL_RPROT0_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_SBL_RPROT0_CHUNKS_Msk 0xFFFFFFFF

// SBL_RPROT1 - These bits read-protect NVRAM in 16KB chunks. Only SBL can override these through Secure OTA.
#define AM_REG_OTP_INFOC_SBL_RPROT1_CHUNKS_S 0
#define AM_REG_OTP_INFOC_SBL_RPROT1_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_SBL_RPROT1_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_SBL_RPROT1_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_SBL_RPROT1_CHUNKS_Msk 0xFFFFFFFF

// SBL_RPROT2 - These bits read-protect NVRAM in 16KB chunks. Only SBL can override these through Secure OTA.
#define AM_REG_OTP_INFOC_SBL_RPROT2_CHUNKS_S 0
#define AM_REG_OTP_INFOC_SBL_RPROT2_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_SBL_RPROT2_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_SBL_RPROT2_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_SBL_RPROT2_CHUNKS_Msk 0xFFFFFFFF

// SBL_RPROT3 - These bits read-protect NVRAM in 16KB chunks. Only SBL can override these through Secure OTA.
#define AM_REG_OTP_INFOC_SBL_RPROT3_CHUNKS_S 0
#define AM_REG_OTP_INFOC_SBL_RPROT3_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_SBL_RPROT3_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_SBL_RPROT3_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_SBL_RPROT3_CHUNKS_Msk 0xFFFFFFFF

// SBL_RPROT4 - These bits read-protect NVRAM in 16KB chunks. Only SBL can override these through Secure OTA.
#define AM_REG_OTP_INFOC_SBL_RPROT4_CHUNKS_S 0
#define AM_REG_OTP_INFOC_SBL_RPROT4_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_SBL_RPROT4_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_SBL_RPROT4_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_SBL_RPROT4_CHUNKS_Msk 0xFFFFFFFF

// SBL_RPROT5 - These bits read-protect NVRAM in 16KB chunks. Only SBL can override these through Secure OTA.
#define AM_REG_OTP_INFOC_SBL_RPROT5_CHUNKS_S 0
#define AM_REG_OTP_INFOC_SBL_RPROT5_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_SBL_RPROT5_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_SBL_RPROT5_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_SBL_RPROT5_CHUNKS_Msk 0xFFFFFFFF

// SBL_RPROT6 - These bits read-protect NVRAM in 16KB chunks. Only SBL can override these through Secure OTA.
#define AM_REG_OTP_INFOC_SBL_RPROT6_CHUNKS_S 0
#define AM_REG_OTP_INFOC_SBL_RPROT6_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_SBL_RPROT6_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_SBL_RPROT6_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_SBL_RPROT6_CHUNKS_Msk 0xFFFFFFFF

// SBL_RPROT7 - These bits read-protect NVRAM in 16KB chunks. Only SBL can override these through Secure OTA.
#define AM_REG_OTP_INFOC_SBL_RPROT7_CHUNKS_S 0
#define AM_REG_OTP_INFOC_SBL_RPROT7_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_SBL_RPROT7_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_SBL_RPROT7_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_SBL_RPROT7_CHUNKS_Msk 0xFFFFFFFF

// DCU_DISABLEOVERRIDE - This 32-bit word contains the DCU override configuration.
#define AM_REG_OTP_INFOC_DCU_DISABLEOVERRIDE_QUALIFIED_DCU_S 0
#define AM_REG_OTP_INFOC_DCU_DISABLEOVERRIDE_QUALIFIED_DCU_M 0x001FFFFF
#define AM_REG_OTP_INFOC_DCU_DISABLEOVERRIDE_QUALIFIED_DCU(n) (((uint32_t)(n) << 0) & 0x001FFFFF)
#define AM_REG_OTP_INFOC_DCU_DISABLEOVERRIDE_QUALIFIED_DCU_Pos 0
#define AM_REG_OTP_INFOC_DCU_DISABLEOVERRIDE_QUALIFIED_DCU_Msk 0x001FFFFF

// SEC_POL - OEM/customer security policy.
#define AM_REG_OTP_INFOC_SEC_POL_AUTH_ENF_ECC_S 29
#define AM_REG_OTP_INFOC_SEC_POL_AUTH_ENF_ECC_M 0xE0000000
#define AM_REG_OTP_INFOC_SEC_POL_AUTH_ENF_ECC(n) (((uint32_t)(n) << 29) & 0xE0000000)
#define AM_REG_OTP_INFOC_SEC_POL_AUTH_ENF_ECC_Pos 29
#define AM_REG_OTP_INFOC_SEC_POL_AUTH_ENF_ECC_Msk 0xE0000000
#define AM_REG_OTP_INFOC_SEC_POL_ENC_ENFORCE_S 26
#define AM_REG_OTP_INFOC_SEC_POL_ENC_ENFORCE_M 0x1C000000
#define AM_REG_OTP_INFOC_SEC_POL_ENC_ENFORCE(n) (((uint32_t)(n) << 26) & 0x1C000000)
#define AM_REG_OTP_INFOC_SEC_POL_ENC_ENFORCE_Pos 26
#define AM_REG_OTP_INFOC_SEC_POL_ENC_ENFORCE_Msk 0x1C000000
#define AM_ENUM_OTP_INFOC_SEC_POL_ENC_ENFORCE_Disabled          0x5  // No Decryption for OTA Updates.
#define AM_ENUM_OTP_INFOC_SEC_POL_ENC_ENFORCE_Enabled           0x2  // Decryption required for OTA Updates.
#define AM_ENUM_OTP_INFOC_SEC_POL_ENC_ENFORCE_UNINIT            0x0  // Decryption requirement is uninitialized.
#define AM_REG_OTP_INFOC_SEC_POL_AUTH_ENFORCE_S 23
#define AM_REG_OTP_INFOC_SEC_POL_AUTH_ENFORCE_M 0x03800000
#define AM_REG_OTP_INFOC_SEC_POL_AUTH_ENFORCE(n) (((uint32_t)(n) << 23) & 0x03800000)
#define AM_REG_OTP_INFOC_SEC_POL_AUTH_ENFORCE_Pos 23
#define AM_REG_OTP_INFOC_SEC_POL_AUTH_ENFORCE_Msk 0x03800000
#define AM_ENUM_OTP_INFOC_SEC_POL_AUTH_ENFORCE_Disabled         0x5  // No Authentication for OTA Updates.
#define AM_ENUM_OTP_INFOC_SEC_POL_AUTH_ENFORCE_Enabled          0x2  // Authentication required for OTA Updates.
#define AM_ENUM_OTP_INFOC_SEC_POL_AUTH_ENFORCE_UNINIT           0x0  // Authentication requirement is uninitialized.
#define AM_REG_OTP_INFOC_SEC_POL_SBL_SWO_PIN_S 0
#define AM_REG_OTP_INFOC_SEC_POL_SBL_SWO_PIN_M 0x000000FF
#define AM_REG_OTP_INFOC_SEC_POL_SBL_SWO_PIN(n) (((uint32_t)(n) << 0) & 0x000000FF)
#define AM_REG_OTP_INFOC_SEC_POL_SBL_SWO_PIN_Pos 0
#define AM_REG_OTP_INFOC_SEC_POL_SBL_SWO_PIN_Msk 0x000000FF

// BOOT_OVERRIDE - This 32-bit word contains the boot override configuration.
#define AM_REG_OTP_INFOC_BOOT_OVERRIDE_ENABLE_S 9
#define AM_REG_OTP_INFOC_BOOT_OVERRIDE_ENABLE_M 0x00000200
#define AM_REG_OTP_INFOC_BOOT_OVERRIDE_ENABLE(n) (((uint32_t)(n) << 9) & 0x00000200)
#define AM_REG_OTP_INFOC_BOOT_OVERRIDE_ENABLE_Pos 9
#define AM_REG_OTP_INFOC_BOOT_OVERRIDE_ENABLE_Msk 0x00000200
#define AM_REG_OTP_INFOC_BOOT_OVERRIDE_POL_S 8
#define AM_REG_OTP_INFOC_BOOT_OVERRIDE_POL_M 0x00000100
#define AM_REG_OTP_INFOC_BOOT_OVERRIDE_POL(n) (((uint32_t)(n) << 8) & 0x00000100)
#define AM_REG_OTP_INFOC_BOOT_OVERRIDE_POL_Pos 8
#define AM_REG_OTP_INFOC_BOOT_OVERRIDE_POL_Msk 0x00000100
#define AM_REG_OTP_INFOC_BOOT_OVERRIDE_GPIO_S 0
#define AM_REG_OTP_INFOC_BOOT_OVERRIDE_GPIO_M 0x000000FF
#define AM_REG_OTP_INFOC_BOOT_OVERRIDE_GPIO(n) (((uint32_t)(n) << 0) & 0x000000FF)
#define AM_REG_OTP_INFOC_BOOT_OVERRIDE_GPIO_Pos 0
#define AM_REG_OTP_INFOC_BOOT_OVERRIDE_GPIO_Msk 0x000000FF

// WIRED_CONFIG - This 32-bit word contains the configuration for Wired Updates.
#define AM_REG_OTP_INFOC_WIRED_CONFIG_UARTMODULE_S 16
#define AM_REG_OTP_INFOC_WIRED_CONFIG_UARTMODULE_M 0x00030000
#define AM_REG_OTP_INFOC_WIRED_CONFIG_UARTMODULE(n) (((uint32_t)(n) << 16) & 0x00030000)
#define AM_REG_OTP_INFOC_WIRED_CONFIG_UARTMODULE_Pos 16
#define AM_REG_OTP_INFOC_WIRED_CONFIG_UARTMODULE_Msk 0x00030000
#define AM_REG_OTP_INFOC_WIRED_CONFIG_SLAVEINTPIN_S 3
#define AM_REG_OTP_INFOC_WIRED_CONFIG_SLAVEINTPIN_M 0x000007F8
#define AM_REG_OTP_INFOC_WIRED_CONFIG_SLAVEINTPIN(n) (((uint32_t)(n) << 3) & 0x000007F8)
#define AM_REG_OTP_INFOC_WIRED_CONFIG_SLAVEINTPIN_Pos 3
#define AM_REG_OTP_INFOC_WIRED_CONFIG_SLAVEINTPIN_Msk 0x000007F8
#define AM_REG_OTP_INFOC_WIRED_CONFIG_SPI_S 1
#define AM_REG_OTP_INFOC_WIRED_CONFIG_SPI_M 0x00000002
#define AM_REG_OTP_INFOC_WIRED_CONFIG_SPI(n) (((uint32_t)(n) << 1) & 0x00000002)
#define AM_REG_OTP_INFOC_WIRED_CONFIG_SPI_Pos 1
#define AM_REG_OTP_INFOC_WIRED_CONFIG_SPI_Msk 0x00000002
#define AM_REG_OTP_INFOC_WIRED_CONFIG_UART_S 0
#define AM_REG_OTP_INFOC_WIRED_CONFIG_UART_M 0x00000001
#define AM_REG_OTP_INFOC_WIRED_CONFIG_UART(n) (((uint32_t)(n) << 0) & 0x00000001)
#define AM_REG_OTP_INFOC_WIRED_CONFIG_UART_Pos 0
#define AM_REG_OTP_INFOC_WIRED_CONFIG_UART_Msk 0x00000001

// CUST_WPROT0 - These bits write-protect NVRAM in 16KB chunks.
#define AM_REG_OTP_INFOC_CUST_WPROT0_CHUNKS_S 0
#define AM_REG_OTP_INFOC_CUST_WPROT0_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_CUST_WPROT0_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_CUST_WPROT0_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_CUST_WPROT0_CHUNKS_Msk 0xFFFFFFFF

// CUST_WPROT1 - These bits write-protect NVRAM in 16KB chunks.
#define AM_REG_OTP_INFOC_CUST_WPROT1_CHUNKS_S 0
#define AM_REG_OTP_INFOC_CUST_WPROT1_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_CUST_WPROT1_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_CUST_WPROT1_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_CUST_WPROT1_CHUNKS_Msk 0xFFFFFFFF

// CUST_WPROT2 - These bits write-protect NVRAM in 16KB chunks.
#define AM_REG_OTP_INFOC_CUST_WPROT2_CHUNKS_S 0
#define AM_REG_OTP_INFOC_CUST_WPROT2_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_CUST_WPROT2_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_CUST_WPROT2_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_CUST_WPROT2_CHUNKS_Msk 0xFFFFFFFF

// CUST_WPROT3 - These bits write-protect NVRAM in 16KB chunks.
#define AM_REG_OTP_INFOC_CUST_WPROT3_CHUNKS_S 0
#define AM_REG_OTP_INFOC_CUST_WPROT3_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_CUST_WPROT3_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_CUST_WPROT3_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_CUST_WPROT3_CHUNKS_Msk 0xFFFFFFFF

// CUST_WPROT4 - These bits write-protect NVRAM in 16KB chunks.
#define AM_REG_OTP_INFOC_CUST_WPROT4_CHUNKS_S 0
#define AM_REG_OTP_INFOC_CUST_WPROT4_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_CUST_WPROT4_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_CUST_WPROT4_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_CUST_WPROT4_CHUNKS_Msk 0xFFFFFFFF

// CUST_WPROT5 - These bits write-protect NVRAM in 16KB chunks.
#define AM_REG_OTP_INFOC_CUST_WPROT5_CHUNKS_S 0
#define AM_REG_OTP_INFOC_CUST_WPROT5_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_CUST_WPROT5_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_CUST_WPROT5_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_CUST_WPROT5_CHUNKS_Msk 0xFFFFFFFF

// CUST_WPROT6 - These bits write-protect NVRAM in 16KB chunks.
#define AM_REG_OTP_INFOC_CUST_WPROT6_CHUNKS_S 0
#define AM_REG_OTP_INFOC_CUST_WPROT6_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_CUST_WPROT6_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_CUST_WPROT6_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_CUST_WPROT6_CHUNKS_Msk 0xFFFFFFFF

// CUST_WPROT7 - These bits write-protect NVRAM in 16KB chunks.
#define AM_REG_OTP_INFOC_CUST_WPROT7_CHUNKS_S 0
#define AM_REG_OTP_INFOC_CUST_WPROT7_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_CUST_WPROT7_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_CUST_WPROT7_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_CUST_WPROT7_CHUNKS_Msk 0xFFFFFFFF

// CUSTOTP_PROGLOCK - customer OTP keybank program lock
#define AM_REG_OTP_INFOC_CUSTOTP_PROGLOCK_RESERVED_S 4
#define AM_REG_OTP_INFOC_CUSTOTP_PROGLOCK_RESERVED_M 0xFFFFFFF0
#define AM_REG_OTP_INFOC_CUSTOTP_PROGLOCK_RESERVED(n) (((uint32_t)(n) << 4) & 0xFFFFFFF0)
#define AM_REG_OTP_INFOC_CUSTOTP_PROGLOCK_RESERVED_Pos 4
#define AM_REG_OTP_INFOC_CUSTOTP_PROGLOCK_RESERVED_Msk 0xFFFFFFF0
#define AM_REG_OTP_INFOC_CUSTOTP_PROGLOCK_LOCK_S 0
#define AM_REG_OTP_INFOC_CUSTOTP_PROGLOCK_LOCK_M 0x0000000F
#define AM_REG_OTP_INFOC_CUSTOTP_PROGLOCK_LOCK(n) (((uint32_t)(n) << 0) & 0x0000000F)
#define AM_REG_OTP_INFOC_CUSTOTP_PROGLOCK_LOCK_Pos 0
#define AM_REG_OTP_INFOC_CUSTOTP_PROGLOCK_LOCK_Msk 0x0000000F

// CUSTOTP_RDLOCK - customer OTP keybank read lock
#define AM_REG_OTP_INFOC_CUSTOTP_RDLOCK_RESERVED_S 8
#define AM_REG_OTP_INFOC_CUSTOTP_RDLOCK_RESERVED_M 0xFFFFFF00
#define AM_REG_OTP_INFOC_CUSTOTP_RDLOCK_RESERVED(n) (((uint32_t)(n) << 8) & 0xFFFFFF00)
#define AM_REG_OTP_INFOC_CUSTOTP_RDLOCK_RESERVED_Pos 8
#define AM_REG_OTP_INFOC_CUSTOTP_RDLOCK_RESERVED_Msk 0xFFFFFF00
#define AM_REG_OTP_INFOC_CUSTOTP_RDLOCK_LOCK_S 0
#define AM_REG_OTP_INFOC_CUSTOTP_RDLOCK_LOCK_M 0x000000FF
#define AM_REG_OTP_INFOC_CUSTOTP_RDLOCK_LOCK(n) (((uint32_t)(n) << 0) & 0x000000FF)
#define AM_REG_OTP_INFOC_CUSTOTP_RDLOCK_LOCK_Pos 0
#define AM_REG_OTP_INFOC_CUSTOTP_RDLOCK_LOCK_Msk 0x000000FF

// CUSTOTP_READ_KEY0 - customer OTP keybank read key[31:0]
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY0_KEY_S 0
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY0_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY0_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY0_KEY_Pos 0
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY0_KEY_Msk 0xFFFFFFFF

// CUSTOTP_READ_KEY1 - customer OTP keybank read key[63:32]
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY1_KEY_S 0
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY1_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY1_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY1_KEY_Pos 0
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY1_KEY_Msk 0xFFFFFFFF

// CUSTOTP_READ_KEY2 - customer OTP keybank read key[95:64]
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY2_KEY_S 0
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY2_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY2_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY2_KEY_Pos 0
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY2_KEY_Msk 0xFFFFFFFF

// CUSTOTP_READ_KEY3 - customer OTP keybank read key[127:96]
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY3_KEY_S 0
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY3_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY3_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY3_KEY_Pos 0
#define AM_REG_OTP_INFOC_CUSTOTP_READ_KEY3_KEY_Msk 0xFFFFFFFF

// CUSTOTP_PROG_KEY0 - customer OTP keybank PROG key[31:0]
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY0_KEY_S 0
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY0_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY0_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY0_KEY_Pos 0
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY0_KEY_Msk 0xFFFFFFFF

// CUSTOTP_PROG_KEY1 - customer OTP keybank PROG key[63:32]
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY1_KEY_S 0
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY1_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY1_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY1_KEY_Pos 0
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY1_KEY_Msk 0xFFFFFFFF

// CUSTOTP_PROG_KEY2 - customer OTP keybank PROG key[95:64]
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY2_KEY_S 0
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY2_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY2_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY2_KEY_Pos 0
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY2_KEY_Msk 0xFFFFFFFF

// CUSTOTP_PROG_KEY3 - customer OTP keybank PROG key[127:96]
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY3_KEY_S 0
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY3_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY3_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY3_KEY_Pos 0
#define AM_REG_OTP_INFOC_CUSTOTP_PROG_KEY3_KEY_Msk 0xFFFFFFFF

// CUST_RPROT0 - These bits read-protect NVRAM in 16KB chunks.
#define AM_REG_OTP_INFOC_CUST_RPROT0_CHUNKS_S 0
#define AM_REG_OTP_INFOC_CUST_RPROT0_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_CUST_RPROT0_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_CUST_RPROT0_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_CUST_RPROT0_CHUNKS_Msk 0xFFFFFFFF

// CUST_RPROT1 - These bits read-protect NVRAM in 16KB chunks.
#define AM_REG_OTP_INFOC_CUST_RPROT1_CHUNKS_S 0
#define AM_REG_OTP_INFOC_CUST_RPROT1_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_CUST_RPROT1_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_CUST_RPROT1_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_CUST_RPROT1_CHUNKS_Msk 0xFFFFFFFF

// CUST_RPROT2 - These bits read-protect NVRAM in 16KB chunks.
#define AM_REG_OTP_INFOC_CUST_RPROT2_CHUNKS_S 0
#define AM_REG_OTP_INFOC_CUST_RPROT2_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_CUST_RPROT2_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_CUST_RPROT2_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_CUST_RPROT2_CHUNKS_Msk 0xFFFFFFFF

// CUST_RPROT3 - These bits read-protect NVRAM in 16KB chunks.
#define AM_REG_OTP_INFOC_CUST_RPROT3_CHUNKS_S 0
#define AM_REG_OTP_INFOC_CUST_RPROT3_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_CUST_RPROT3_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_CUST_RPROT3_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_CUST_RPROT3_CHUNKS_Msk 0xFFFFFFFF

// CUST_RPROT4 - These bits read-protect NVRAM in 16KB chunks.
#define AM_REG_OTP_INFOC_CUST_RPROT4_CHUNKS_S 0
#define AM_REG_OTP_INFOC_CUST_RPROT4_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_CUST_RPROT4_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_CUST_RPROT4_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_CUST_RPROT4_CHUNKS_Msk 0xFFFFFFFF

// CUST_RPROT5 - These bits read-protect NVRAM in 16KB chunks.
#define AM_REG_OTP_INFOC_CUST_RPROT5_CHUNKS_S 0
#define AM_REG_OTP_INFOC_CUST_RPROT5_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_CUST_RPROT5_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_CUST_RPROT5_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_CUST_RPROT5_CHUNKS_Msk 0xFFFFFFFF

// CUST_RPROT6 - These bits read-protect NVRAM in 16KB chunks.
#define AM_REG_OTP_INFOC_CUST_RPROT6_CHUNKS_S 0
#define AM_REG_OTP_INFOC_CUST_RPROT6_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_CUST_RPROT6_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_CUST_RPROT6_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_CUST_RPROT6_CHUNKS_Msk 0xFFFFFFFF

// CUST_RPROT7 - These bits read-protect NVRAM in 16KB chunks.
#define AM_REG_OTP_INFOC_CUST_RPROT7_CHUNKS_S 0
#define AM_REG_OTP_INFOC_CUST_RPROT7_CHUNKS_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_CUST_RPROT7_CHUNKS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_CUST_RPROT7_CHUNKS_Pos 0
#define AM_REG_OTP_INFOC_CUST_RPROT7_CHUNKS_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT0_KEY0 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY0_KEYBANK_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY0_KEYBANK_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY0_KEYBANK(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY0_KEYBANK_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY0_KEYBANK_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT0_KEY1 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY1_KEYBANK_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY1_KEYBANK_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY1_KEYBANK(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY1_KEYBANK_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY1_KEYBANK_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT0_KEY2 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY2_KEYBANK_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY2_KEYBANK_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY2_KEYBANK(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY2_KEYBANK_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY2_KEYBANK_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT0_KEY3 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY3_KEYBANK_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY3_KEYBANK_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY3_KEYBANK(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY3_KEYBANK_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY3_KEYBANK_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT0_KEY4 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY4_KEYBANK_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY4_KEYBANK_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY4_KEYBANK(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY4_KEYBANK_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY4_KEYBANK_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT0_KEY5 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY5_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY5_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY5_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY5_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY5_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT0_KEY6 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY6_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY6_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY6_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY6_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY6_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT0_KEY7 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY7_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY7_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY7_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY7_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY7_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT0_KEY8 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY8_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY8_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY8_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY8_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY8_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT0_KEY9 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY9_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY9_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY9_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY9_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY9_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT0_KEY10 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY10_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY10_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY10_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY10_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY10_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT0_KEY11 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY11_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY11_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY11_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY11_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY11_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT0_KEY12 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY12_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY12_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY12_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY12_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY12_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT0_KEY13 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY13_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY13_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY13_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY13_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY13_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT0_KEY14 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY14_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY14_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY14_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY14_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY14_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT0_KEY15 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY15_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY15_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY15_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY15_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT0_KEY15_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT1_KEY0 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY0_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY0_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY0_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY0_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY0_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT1_KEY1 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY1_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY1_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY1_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY1_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY1_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT1_KEY2 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY2_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY2_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY2_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY2_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY2_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT1_KEY3 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY3_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY3_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY3_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY3_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY3_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT1_KEY4 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY4_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY4_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY4_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY4_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY4_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT1_KEY5 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY5_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY5_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY5_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY5_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY5_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT1_KEY6 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY6_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY6_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY6_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY6_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY6_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT1_KEY7 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY7_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY7_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY7_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY7_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY7_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT1_KEY8 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY8_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY8_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY8_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY8_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY8_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT1_KEY9 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY9_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY9_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY9_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY9_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY9_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT1_KEY10 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY10_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY10_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY10_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY10_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY10_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT1_KEY11 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY11_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY11_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY11_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY11_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY11_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT1_KEY12 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY12_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY12_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY12_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY12_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY12_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT1_KEY13 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY13_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY13_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY13_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY13_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY13_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT1_KEY14 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY14_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY14_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY14_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY14_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY14_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT1_KEY15 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY15_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY15_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY15_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY15_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT1_KEY15_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT2_KEY0 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY0_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY0_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY0_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY0_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY0_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT2_KEY1 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY1_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY1_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY1_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY1_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY1_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT2_KEY2 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY2_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY2_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY2_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY2_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY2_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT2_KEY3 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY3_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY3_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY3_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY3_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY3_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT2_KEY4 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY4_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY4_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY4_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY4_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY4_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT2_KEY5 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY5_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY5_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY5_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY5_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY5_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT2_KEY6 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY6_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY6_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY6_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY6_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY6_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT2_KEY7 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY7_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY7_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY7_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY7_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY7_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT2_KEY8 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY8_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY8_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY8_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY8_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY8_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT2_KEY9 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY9_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY9_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY9_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY9_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY9_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT2_KEY10 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY10_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY10_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY10_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY10_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY10_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT2_KEY11 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY11_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY11_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY11_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY11_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY11_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT2_KEY12 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY12_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY12_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY12_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY12_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY12_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT2_KEY13 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY13_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY13_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY13_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY13_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY13_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT2_KEY14 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY14_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY14_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY14_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY14_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY14_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT2_KEY15 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY15_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY15_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY15_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY15_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT2_KEY15_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT3_KEY0 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY0_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY0_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY0_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY0_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY0_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT3_KEY1 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY1_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY1_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY1_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY1_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY1_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT3_KEY2 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY2_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY2_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY2_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY2_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY2_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT3_KEY3 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY3_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY3_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY3_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY3_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY3_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT3_KEY4 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY4_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY4_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY4_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY4_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY4_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT3_KEY5 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY5_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY5_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY5_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY5_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY5_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT3_KEY6 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY6_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY6_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY6_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY6_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY6_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT3_KEY7 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY7_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY7_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY7_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY7_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY7_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT3_KEY8 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY8_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY8_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY8_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY8_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY8_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT3_KEY9 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY9_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY9_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY9_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY9_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY9_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT3_KEY10 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY10_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY10_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY10_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY10_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY10_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT3_KEY11 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY11_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY11_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY11_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY11_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY11_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT3_KEY12 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY12_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY12_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY12_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY12_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY12_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT3_KEY13 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY13_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY13_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY13_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY13_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY13_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT3_KEY14 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY14_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY14_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY14_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY14_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY14_KEY_Msk 0xFFFFFFFF

// KEYBANK_CUST_QUADRANT3_KEY15 - Customer key bank
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY15_KEY_S 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY15_KEY_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY15_KEY(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY15_KEY_Pos 0
#define AM_REG_OTP_INFOC_KEYBANK_CUST_QUADRANT3_KEY15_KEY_Msk 0xFFFFFFFF

// SHDW_TRIM_INFO0_SEL - Shadow trim INFO0 Select. If this 32bits field has odd number of 1, the shadow trim Info 0 is copied from OTP; even number of 1, the shadow trim Info 0 is copied from MRAM.
#define AM_REG_OTP_INFOC_SHDW_TRIM_INFO0_SEL_TRIM_SEL_S 0
#define AM_REG_OTP_INFOC_SHDW_TRIM_INFO0_SEL_TRIM_SEL_M 0xFFFFFFFF
#define AM_REG_OTP_INFOC_SHDW_TRIM_INFO0_SEL_TRIM_SEL(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF)
#define AM_REG_OTP_INFOC_SHDW_TRIM_INFO0_SEL_TRIM_SEL_Pos 0
#define AM_REG_OTP_INFOC_SHDW_TRIM_INFO0_SEL_TRIM_SEL_Msk 0xFFFFFFFF

#endif
